Committee Members:
Prof. Samuel Graham, Advisor, MSE/ME
Prof. Eric Vogel, Co-Advisor, MSE
Prof. C. P. Wong, MSE
Prof. Alan Doolittle, ECE
Prof. Arijit Raychowdhury, ECE
""Investigation of Processing Condition on the Reliability and Performance of Future Memory Devices""
Abstract:
About a quarter of the total semiconductor market is comprised of memory technologies. However, due to the limits in scalability related to Moores Law, the need for additional memory capacity and bandwidth is increasing. Currently, dynamic random-access memory (DRAM) is in high-volume but is reaching its scaling limit. To overcome the DRAM scaling limit with higher bandwidth, lower power, and smaller surface area, through-silicon-via (TSV) stacking method via thermo-compression bonding (TCB) technology has been widely employed due to the placement accuracy for 3D packaging technology.
Two project areas will be discussed. In the first project, comprehensive and comparative analysis between the TCB-processed and reflow-processed solder joint reliability performance is investigated. This study investigates the failure analysis of the solder joints via detailed solder joint and solder joint/bond pad interface characterization to understand the reliability issues of the emerging TCB-processed packages. In the second project, memristor, a class of resistive random-access memory (RRAM) will be explored. The RRAM or memristor is an emerging memory that show promise to overcome the current obstacles in conventional memory systems. So far, the difficulty in achieving multiple resistance states and obtaining low resistance variance remain as the challenges towards commercialization and for in-memory computing and synaptic device applications. In this work, the effect of chemical environment of the HfOx/Ti interface and the processing condition during analog operation on the memristor performance are explored. The presence of excess oxygen concentration at the interface and fundamental understanding of the phase transition at the memristor filament tip region during analog operation are investigated to better understand the memristors resistive switching mechanisms.